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<p>This paper addresses power-on reliability in stacked indium phosphide double heterojunction bipolar transistor (InP DHBT) amplifiers for millimeter-wave (mmW)/sub-terahertz (sub-THz) applications. Unlike the complementary metal-oxide-semiconductor (CMOS) process, the biasing conditions of InP-based transistors are critically dependent on the sequence of power sequencing. Through process-specific analysis and electromagnetic simulations, avalanche breakdown induced by transient current overshoot is identified as the primary failure mechanism during on-wafer characterization. An active biasing with inductive gain-boosting network is proposed to ensure reliable operation, providing a foundation for robust stacked amplifier design and testing.</p>

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Failure Analysis and Power-on Sequence Optimization for InP DHBT Stacked Amplifiers

  • 期刊论文

  • 发表日期：

    2025年8月23日

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  • Yao Li,
  • Yan Gao,
  • GuoZhen Hu,
  • Guoqing Huang,
  • Liang Zhao,
  • Yan Sun,
  • Weihua Yu

摘要

This paper addresses power-on reliability in stacked indium phosphide double heterojunction bipolar transistor (InP DHBT) amplifiers for millimeter-wave (mmW)/sub-terahertz (sub-THz) applications. Unlike the complementary metal-oxide-semiconductor (CMOS) process, the biasing conditions of InP-based transistors are critically dependent on the sequence of power sequencing. Through process-specific analysis and electromagnetic simulations, avalanche breakdown induced by transient current overshoot is identified as the primary failure mechanism during on-wafer characterization. An active biasing with inductive gain-boosting network is proposed to ensure reliable operation, providing a foundation for robust stacked amplifier design and testing.