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<p>Read and write stability of the SRAM memory cell is a prime concern due to the continuous scaling of CMOS technology. Scaling increases the packaging density but affects the margins which might lead to write failure or read disturbance of 6T SRAM cell. To enhance the data stability in this work 6T SRAM cell is analyzed with CNTFET technology. A Verilog-A model of CNTFET operates near-threshold region ≈ 0.35&#xa0;V and shows a power consumption of 5.7 pW, which needs 6.97 ps to write into the cell and 4.08 ns to read from the cell. N-curve analysis has been performed to find various stability factors. As compared to conventional CMOS transistors presented work for CNTFET technology is more efficient as SRAM functionality and improved data stability.</p>

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Read & Write Stability of CNTFET 6T SRAM Cell: A Comprehensive Analysis

  • 期刊论文

  • 发表日期：

    2025年2月19日

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  • Vipin Kumar Sharma,
  • Abhishek Kumar

摘要

Read and write stability of the SRAM memory cell is a prime concern due to the continuous scaling of CMOS technology. Scaling increases the packaging density but affects the margins which might lead to write failure or read disturbance of 6T SRAM cell. To enhance the data stability in this work 6T SRAM cell is analyzed with CNTFET technology. A Verilog-A model of CNTFET operates near-threshold region ≈ 0.35 V and shows a power consumption of 5.7 pW, which needs 6.97 ps to write into the cell and 4.08 ns to read from the cell. N-curve analysis has been performed to find various stability factors. As compared to conventional CMOS transistors presented work for CNTFET technology is more efficient as SRAM functionality and improved data stability.