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<p>A Quantum Dot Cellular Automata (QCA) is a nanotechnology-driven computing method that leverages quantum mechanical principles. This work demonstrates the efficient use of reversible logic gates in QCA-based systems, a crucial aspect of scalable and energy-efficient computer designs. In this research, we propose an energy-efficient, compact XOR gate and several common reversible logic gates. The paper further illustrates the use of these gates to construct essential components, such as a one-bit comparator and an arithmetic logic unit (ALU). The ALU, designed with Feynman and Toffoli gates, is capable of performing eight arithmetic and logical operations. We conduct a comprehensive evaluation of cell complexity, area efficiency, delay, area-delay product (ADP), and energy dissipation. Additionally, we compare the characteristics of the proposed circuits with prior efforts to highlight advancements and identify areas for further improvement in reversible computing paradigms. The recommended architecture enhances the performance of the XOR gate, reversible logic gates, one-bit comparator, and ALU. The XOR gate achieves a 67.86% reduction in cell complexity, an 85% improvement in area efficiency, and a 50% reduction in quantum cost. Feynman and Toffoli gates demonstrate a 75% reduction in area and an 87.5% reduction in quantum cost. For the one-bit comparator and ALU, the proposed solution reduces area by 87% and latency by 40%, saving both space and time. With a quantum cost that is 90% lower than traditional designs, the proposed architecture optimizes quantum circuits for real-world applications.</p>

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Design of an energy-efficient XOR gate in QCA with applications in reversible logic-based one-bit comparator and ALU

  • 期刊论文

  • 发表日期：

    2025年12月19日

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  • H. Mangalam,
  • P. Rajasekar,
  • V. Sakthivel

摘要

A Quantum Dot Cellular Automata (QCA) is a nanotechnology-driven computing method that leverages quantum mechanical principles. This work demonstrates the efficient use of reversible logic gates in QCA-based systems, a crucial aspect of scalable and energy-efficient computer designs. In this research, we propose an energy-efficient, compact XOR gate and several common reversible logic gates. The paper further illustrates the use of these gates to construct essential components, such as a one-bit comparator and an arithmetic logic unit (ALU). The ALU, designed with Feynman and Toffoli gates, is capable of performing eight arithmetic and logical operations. We conduct a comprehensive evaluation of cell complexity, area efficiency, delay, area-delay product (ADP), and energy dissipation. Additionally, we compare the characteristics of the proposed circuits with prior efforts to highlight advancements and identify areas for further improvement in reversible computing paradigms. The recommended architecture enhances the performance of the XOR gate, reversible logic gates, one-bit comparator, and ALU. The XOR gate achieves a 67.86% reduction in cell complexity, an 85% improvement in area efficiency, and a 50% reduction in quantum cost. Feynman and Toffoli gates demonstrate a 75% reduction in area and an 87.5% reduction in quantum cost. For the one-bit comparator and ALU, the proposed solution reduces area by 87% and latency by 40%, saving both space and time. With a quantum cost that is 90% lower than traditional designs, the proposed architecture optimizes quantum circuits for real-world applications.