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<p>The development of safe hardware is currently a major concern in the automotive industry. Due to the high computational and memory requirements of advanced driver-assistance systems and autonomous driving, consumer hardware such as LPDDR DRAM is being deployed in safety-critical areas. Parts 5 and 11 of ISO 26262 define procedures and methods for the development of hardware to achieve a specific Automotive Safety Integrity Level (ASIL). However, consumer devices like LPDDR DRAMs were not originally intended for use in these applications, so they only achieve low ASILs. Additional safety measures can still be added at system level, but this often comes at the cost of reduced performance. In this paper, we present a novel methodology that combines the hardware metrics analysis of ISO 26262 with SystemC-based virtual prototyping. This enables the analysis of a system both from the safety as well as from the performance perspective using the same simulation setup. To show the applicability of this methodology, we model an LPDDR5 memory subsystem of a current state-of-the-art ADAS platform and evaluate both the ASIL as well as the performance impact of the safety measures. The new methodology is fully implemented in SystemC and provided as open-source.</p>

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Split’n’Cover: ISO 26262 Hardware Safety Analysis with SystemC

  • 期刊论文

  • 出版模式：

    开放获取

  • 发表日期：

    2025年4月28日

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  • Lukas Steiner,
  • Kira Kraft,
  • Derek Christ,
  • Denis Uecker,
  • Christian Malek,
  • Matthias Jung,
  • Norbert Wehn

摘要

The development of safe hardware is currently a major concern in the automotive industry. Due to the high computational and memory requirements of advanced driver-assistance systems and autonomous driving, consumer hardware such as LPDDR DRAM is being deployed in safety-critical areas. Parts 5 and 11 of ISO 26262 define procedures and methods for the development of hardware to achieve a specific Automotive Safety Integrity Level (ASIL). However, consumer devices like LPDDR DRAMs were not originally intended for use in these applications, so they only achieve low ASILs. Additional safety measures can still be added at system level, but this often comes at the cost of reduced performance. In this paper, we present a novel methodology that combines the hardware metrics analysis of ISO 26262 with SystemC-based virtual prototyping. This enables the analysis of a system both from the safety as well as from the performance perspective using the same simulation setup. To show the applicability of this methodology, we model an LPDDR5 memory subsystem of a current state-of-the-art ADAS platform and evaluate both the ASIL as well as the performance impact of the safety measures. The new methodology is fully implemented in SystemC and provided as open-source.