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<p>This paper introduced the design of a novel Ultra-Wide Band (UWB) digital variable gain amplifier (DVGA) for a multi band-OFDM UWB communication system able to ensure a broad bandwidth for low power, low area regardless of the gain adjustment. The proposed DVGA takes advantage of the benefits provided by the bandwidth extension, on the one hand, and those offered by the digital control techniques, on the other. This allowed the amplifier to provide a large bandwidth at a low power consumption and ensure a flexible gain adjustment using a digital polarization current control block. The Heuristic and contour graph methods were used to optimize the proposed circuit performance and fix the control parameters range intended to satisfy the UWB specification requirements. The newly-designed circuit was simulated using the Advanced Design System (ADS) tool with a device-level description of the TSMC 0.18&#xa0;μm CMOS process. The DVGA achieved 61.43dB gain control range, 356&#xa0;MHz bandwidth, 11.5dBm third-order input-intercept point as a maximum gain and less than 19dB noise figure as a maximum gain which makes it convenient for UWB receivers. The overall power consumption of the proposed DVGA circuit is 0.47mW under ± 0.9&#xa0;V power supply.</p>

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A novel low power cmos digital variable gain amplifier design for multi band-OFDM UWB communication system

  • 期刊论文

  • 发表日期：

    2026年8月4日

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  • Samir Ben Salem,
  • Houda Daoud,
  • Sawssen Lahiani,
  • Mourad Loulou

摘要

This paper introduced the design of a novel Ultra-Wide Band (UWB) digital variable gain amplifier (DVGA) for a multi band-OFDM UWB communication system able to ensure a broad bandwidth for low power, low area regardless of the gain adjustment. The proposed DVGA takes advantage of the benefits provided by the bandwidth extension, on the one hand, and those offered by the digital control techniques, on the other. This allowed the amplifier to provide a large bandwidth at a low power consumption and ensure a flexible gain adjustment using a digital polarization current control block. The Heuristic and contour graph methods were used to optimize the proposed circuit performance and fix the control parameters range intended to satisfy the UWB specification requirements. The newly-designed circuit was simulated using the Advanced Design System (ADS) tool with a device-level description of the TSMC 0.18 μm CMOS process. The DVGA achieved 61.43dB gain control range, 356 MHz bandwidth, 11.5dBm third-order input-intercept point as a maximum gain and less than 19dB noise figure as a maximum gain which makes it convenient for UWB receivers. The overall power consumption of the proposed DVGA circuit is 0.47mW under ± 0.9 V power supply.