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<p>This paper presents a comprehensive examination of various low-power design techniques for VLSI circuits, highlighting the critical need to reduce energy consumption in battery-operated embedded systems while maintaining performance. The research discusses several strategies across multiple abstraction levels, including system, architectural, gate, and device levels. One of the standout elements of this review is the in-depth analysis of trade-offs (see Table&#xa0;2), which assesses power savings, area overheads, and propagation delays across various technology nodes. By combining traditional methods like clock gating with innovative approaches, such as FinFET technology and machine-learning optimization, this study establishes a practical framework for achieving energy-efficient VLSI design. The findings suggest that selecting the right technique necessitates a careful balance between manufacturing constraints and the specific performance objectives of the application.</p>

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A comprehensive review of low-power design techniques in VLSI systems: From device physics to algorithmic optimization

  • 期刊论文

  • 出版模式：

    开放获取

  • 发表日期：

    2026年7月4日

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  • Marina Papadopoulou,
  • Michael Dossis,
  • Evangelos Karvounis

摘要

This paper presents a comprehensive examination of various low-power design techniques for VLSI circuits, highlighting the critical need to reduce energy consumption in battery-operated embedded systems while maintaining performance. The research discusses several strategies across multiple abstraction levels, including system, architectural, gate, and device levels. One of the standout elements of this review is the in-depth analysis of trade-offs (see Table 2), which assesses power savings, area overheads, and propagation delays across various technology nodes. By combining traditional methods like clock gating with innovative approaches, such as FinFET technology and machine-learning optimization, this study establishes a practical framework for achieving energy-efficient VLSI design. The findings suggest that selecting the right technique necessitates a careful balance between manufacturing constraints and the specific performance objectives of the application.