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<p>This paper demonstrates a high-precision bandgap reference (BGR) that features a wide input voltage range and high-order temperature compensation. The design achieves an extremely low temperature coefficient (TC) across a wide –40℃ to 160℃ operating range. This low TC is enabled by a novel multi-segment curvature compensation (MSCC) circuit, which incorporates subtraction-addition circuits with current mirror techniques based on a conventional current-mode BGR. Furthermore, a pre-regulator is incorporated to extend the input range from 4 to 40&#xa0;V, thereby improving immunity to supply voltage variations. The designed BGR is fabricated using a 0.18&#xa0;µm Bipolar–CMOS–DMOS (BCD) process. Simulation results demonstrate a stable voltage of <InlineEquation ID="IEq3"> <EquationSource Format="TEX">\(1.2 V\)</EquationSource> </InlineEquation> over the full temperature range, with a TC of only <InlineEquation ID="IEq4"> <EquationSource Format="TEX">\(0.439 ppm/^\circ{\rm C}. \)</EquationSource> </InlineEquation> Additionally, the power supply rejection ratio (PSRR) respectively reaches <InlineEquation ID="IEq5"> <EquationSource Format="TEX">\(-129.5 dB\)</EquationSource> </InlineEquation> at 10&#xa0;Hz,<InlineEquation ID="IEq6"> <EquationSource Format="TEX">\(-123.8 dB\)</EquationSource> </InlineEquation> at 1&#xa0;kHz, and <InlineEquation ID="IEq7"> <EquationSource Format="TEX">\(-72.7 dB\)</EquationSource> </InlineEquation> at 100&#xa0;kHz.</p>

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A 0.439 \(ppm/^\circ{\rm C} \) CMOS bandgap reference with 4\(\sim \)40V supply-range and high-order curvature compensations

  • 期刊论文

  • 发表日期：

    2026年7月6日

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  • Chunlai Wang,
  • Shaobin Zhu,
  • Yugeng Zhang,
  • Muhammad Ahsan Farooq Qaisar,
  • Weihua Han

摘要

This paper demonstrates a high-precision bandgap reference (BGR) that features a wide input voltage range and high-order temperature compensation. The design achieves an extremely low temperature coefficient (TC) across a wide –40℃ to 160℃ operating range. This low TC is enabled by a novel multi-segment curvature compensation (MSCC) circuit, which incorporates subtraction-addition circuits with current mirror techniques based on a conventional current-mode BGR. Furthermore, a pre-regulator is incorporated to extend the input range from 4 to 40 V, thereby improving immunity to supply voltage variations. The designed BGR is fabricated using a 0.18 µm Bipolar–CMOS–DMOS (BCD) process. Simulation results demonstrate a stable voltage of \(1.2 V\) over the full temperature range, with a TC of only \(0.439 ppm/^\circ{\rm C}. \) Additionally, the power supply rejection ratio (PSRR) respectively reaches \(-129.5 dB\) at 10 Hz, \(-123.8 dB\) at 1 kHz, and \(-72.7 dB\) at 100 kHz.