<p>In this work a detailed comprehensive study of single charge trap (SCT) induced random telegraph noise (RTN) in homo-junction, and hetero-junction single-gate (SG) and L_shaped tunnel field-effect-transistor (LTFET) are reported. Using TCAD simulations, relative RTN amplitude of SCT located at three different locations i.e. at oxide-channel interface, channel, and in source region is performed for all the structures. In hetero-junction TFET, the presence of more charge carriers reduces the impact of SCT on device characteristics as compared to homo-junction TFET. Also, it has been found that on reducing the gate length, the drain-current reduces as a results of the rapid reduction in electron band-to-band (BTB) generation rate at the tunneling junction. Furthermore, the relative RTN amplitude dependence on different parameters like doping variation, temperature variation, work function variation, and gate tunneling was carried out and the study states that the SCT located at interface and channel shows maximum impact on device characteristics followed by the SCT located in source. The SCT located at tunneling junction shows maximum RTN amplitude because of the exponential dependence of tunneling current on critical tunneling path. The proposed hetero-junction LTFET shows good performance like high I<sub>ON</sub> of 1.39 × 10<sup>− 4</sup> A/µm, low I<sub>OFF</sub> of 7.56 × 10<sup>–12</sup>&#xa0;A/µm, and high I<sub>ON</sub>/I<sub>OFF</sub> ratio of 10<sup>8</sup>. Furthermore, the presence of more number of carriers in LTFET screens the trap charges more effectively, and hence relative RTN amplitude is also less.</p>

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Impact of charge trapping on low frequency noise characteristics in nanoscale L-shaped TFET

  • Sweta Chander,
  • Sanjeet Kumar Sinha,
  • Ashish Kumar Singh

摘要

In this work a detailed comprehensive study of single charge trap (SCT) induced random telegraph noise (RTN) in homo-junction, and hetero-junction single-gate (SG) and L_shaped tunnel field-effect-transistor (LTFET) are reported. Using TCAD simulations, relative RTN amplitude of SCT located at three different locations i.e. at oxide-channel interface, channel, and in source region is performed for all the structures. In hetero-junction TFET, the presence of more charge carriers reduces the impact of SCT on device characteristics as compared to homo-junction TFET. Also, it has been found that on reducing the gate length, the drain-current reduces as a results of the rapid reduction in electron band-to-band (BTB) generation rate at the tunneling junction. Furthermore, the relative RTN amplitude dependence on different parameters like doping variation, temperature variation, work function variation, and gate tunneling was carried out and the study states that the SCT located at interface and channel shows maximum impact on device characteristics followed by the SCT located in source. The SCT located at tunneling junction shows maximum RTN amplitude because of the exponential dependence of tunneling current on critical tunneling path. The proposed hetero-junction LTFET shows good performance like high ION of 1.39 × 10− 4 A/µm, low IOFF of 7.56 × 10–12 A/µm, and high ION/IOFF ratio of 108. Furthermore, the presence of more number of carriers in LTFET screens the trap charges more effectively, and hence relative RTN amplitude is also less.