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<p>A novel 16T 4:2 compressor is designed using workfunction engineering (WFE), whereby variation of WF in gate contacts is applied to independently biased compact sub 10&#xa0;nm ambipolar Schottky-barrier (SB) FinFETs. The SB-FinFET utilises metal-semiconductor junctions, commonly referred to as Schottky barriers. This paper uses the gate voltage to control the barrier height and width, which regulates the current through the tunnelling when the device is ON and minimises leakages when it is OFF. The FinFET offers reasonable electrostatic control and the potential for high-energy-efficient logic circuits, as well as reduced parasitic resistance and improved switching speed. The performance of the compressor circuit is enhanced by using a 3T-XOR gate with non-inverting inputs, as verified through industry-standard TCAD simulation. The device simulations were performed using Synopsys Sentaurus TCAD, which accurately models Schottky barrier contacts and ambipolar conduction characteristics. The reduction rate for area improvement of the proposed circuit is 52%, whereas the improvement in power delay product is up to 7 times. The proposed 16T ambipolar FinFET design achieves an EDAP of 228,672, orders of magnitude smaller than all conventional designs. With only 16 transistors, the circuit saves 52% area compared to traditional 4:2 compressors (36–68 transistors). Low power (1.518 µW) and moderate delay (97 ns) yield a very low energy-delay product, confirming high energy efficiency. The switching characteristics of an ambipolar-based compressor circuit demonstrate that WFE in independent-biased SB-FinFETs can simultaneously direct sub-10&#xa0;nm logic design to an optimised data path system without degradation in energy performance, saving area, and power.</p>

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Energy and area efficient 4:2 compressor for sub-10 nm CMOS with gate work function engineered FinFETs

  • 期刊论文

  • 发表日期：

    2025年12月10日

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  • Nehru Kandasamy,
  • Nagarjuna Telagam,
  • Balwinder Raj,
  • M. Arun Kumar

摘要

A novel 16T 4:2 compressor is designed using workfunction engineering (WFE), whereby variation of WF in gate contacts is applied to independently biased compact sub 10 nm ambipolar Schottky-barrier (SB) FinFETs. The SB-FinFET utilises metal-semiconductor junctions, commonly referred to as Schottky barriers. This paper uses the gate voltage to control the barrier height and width, which regulates the current through the tunnelling when the device is ON and minimises leakages when it is OFF. The FinFET offers reasonable electrostatic control and the potential for high-energy-efficient logic circuits, as well as reduced parasitic resistance and improved switching speed. The performance of the compressor circuit is enhanced by using a 3T-XOR gate with non-inverting inputs, as verified through industry-standard TCAD simulation. The device simulations were performed using Synopsys Sentaurus TCAD, which accurately models Schottky barrier contacts and ambipolar conduction characteristics. The reduction rate for area improvement of the proposed circuit is 52%, whereas the improvement in power delay product is up to 7 times. The proposed 16T ambipolar FinFET design achieves an EDAP of 228,672, orders of magnitude smaller than all conventional designs. With only 16 transistors, the circuit saves 52% area compared to traditional 4:2 compressors (36–68 transistors). Low power (1.518 µW) and moderate delay (97 ns) yield a very low energy-delay product, confirming high energy efficiency. The switching characteristics of an ambipolar-based compressor circuit demonstrate that WFE in independent-biased SB-FinFETs can simultaneously direct sub-10 nm logic design to an optimised data path system without degradation in energy performance, saving area, and power.