High-speed anaglyph image generation using a three-operand multiplier on FPGA
摘要
Anaglyph 3D technology has recently developed and become more widely available. This has led to an increase in demand, which is only reasonable given the market’s fast expansion and the high need for electronic media. The majority of films made nowadays are in 3D format. Here, we provide a straightforward way for creating anaglyph 3D images using VLSI technology. This method takes less time and money, is suited for any real-world video sequence, and yields smooth results .In this study, we employ novelty-based three-operand multiplications to multiply the image layers of right eye, left eye, and depth. This study introduces a novel three-operand multiplier based on Wallace tree architecture in order to be faster and more dependable. This proposed multiplier uses a 3 input AND gate approach to generate partial product, which is then compressed using 7:2 compressor, 5:2 compressor, 4:2 compressor, and full adders. The final addition was carried out using five separate 24-bit versions of a parallel prefix three operand adder. As to create anaglyph 3D images, image multiplication was performed using a resolution of 640 × 480 pixels, and PSNR and SSIM values were calculated as evaluation criteria. The results of all parameters were compared for this proposed implementation, which was created using Xilinx Vertex-5 FPGA and Verilog HDL. The Wallace Tree Multiplier designed for three operand multiplication is proven to produce lesser delay and power compared to all other designs.