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<p>Median filtering techniques are widely used in image processing for eliminating salt-and-pepper noise while preserving the important edge details. However, the Exact Median Filter (EMF), though accurate, incurs significant computational complexity, making it not suitable for real-time and hardware resource- constrained platforms. To address these limitations, this research work proposes an Approximate Median Filter (AMF) architecture implemented on a PYNQ-Z2 FPGA using optimized comparator logic that balances image reconstruction quality and hardware utilization. The proposed design involves two comparator architectures that leverage a combination of exact and approximate borrow-based approach obtained from the full subtractor logic. These architectures minimize the number of comparators required, only 18 for a 3 × 3 window, thereby reducing the hardware resource utilization, latency, and power consumption. Experimental results on a 512 × 512 grayscale image dataset across various noise densities from 10% to 90% demonstrate the superiority of the proposed design over existing state-of-the-art filters. The proposed design-1 and design-2 achieve significant reductions in Slice LUTs (up to 20. 26%), Slice Registers (23.61%) and BRAMs (61. 53%) compared to existing methods. Power consumption is decreased by up to 34.52%, and latency is reduced by 50%. In terms of image reconstruction, the suggested median filter consistently outperforms existing filters, achieving improvements in PSNR (∼ 22.7%), IEF (∼ 58.13%), and SSIM (∼ 20.16%) at high-level noise densities. Moreover, the results from the Wilcoxon Signed-Rank test compared to existing methods show that Proposed-1 excels in 80% of cases (<i>p</i> &lt; 0.05), especially under low to moderate noise conditions. In contrast, Proposed-2 is noted for its superior structural preservation as evidenced by multiple benchmark images. The obtained results confirm that the proposed AMF architecture provides an effective trade-off between noise reduction and the utilization of hardware resources, making it highly suitable for real-time image processing applications such as medical imaging, video surveillance, and embedded vision systems.</p>

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Approximate median filter architecture with optimized comparator logic for real-time image denoising on FPGA

  • 期刊论文

  • 发表日期：

    2025年11月10日

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  • V. Anbumani,
  • S. Usha,
  • Suresh Muthusamy,
  • Ghanapriya Singh

摘要

Median filtering techniques are widely used in image processing for eliminating salt-and-pepper noise while preserving the important edge details. However, the Exact Median Filter (EMF), though accurate, incurs significant computational complexity, making it not suitable for real-time and hardware resource- constrained platforms. To address these limitations, this research work proposes an Approximate Median Filter (AMF) architecture implemented on a PYNQ-Z2 FPGA using optimized comparator logic that balances image reconstruction quality and hardware utilization. The proposed design involves two comparator architectures that leverage a combination of exact and approximate borrow-based approach obtained from the full subtractor logic. These architectures minimize the number of comparators required, only 18 for a 3 × 3 window, thereby reducing the hardware resource utilization, latency, and power consumption. Experimental results on a 512 × 512 grayscale image dataset across various noise densities from 10% to 90% demonstrate the superiority of the proposed design over existing state-of-the-art filters. The proposed design-1 and design-2 achieve significant reductions in Slice LUTs (up to 20. 26%), Slice Registers (23.61%) and BRAMs (61. 53%) compared to existing methods. Power consumption is decreased by up to 34.52%, and latency is reduced by 50%. In terms of image reconstruction, the suggested median filter consistently outperforms existing filters, achieving improvements in PSNR (∼ 22.7%), IEF (∼ 58.13%), and SSIM (∼ 20.16%) at high-level noise densities. Moreover, the results from the Wilcoxon Signed-Rank test compared to existing methods show that Proposed-1 excels in 80% of cases (p < 0.05), especially under low to moderate noise conditions. In contrast, Proposed-2 is noted for its superior structural preservation as evidenced by multiple benchmark images. The obtained results confirm that the proposed AMF architecture provides an effective trade-off between noise reduction and the utilization of hardware resources, making it highly suitable for real-time image processing applications such as medical imaging, video surveillance, and embedded vision systems.