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<p>A high linearity and double input range (DIR) switching scheme for successive approximation register analog-to-digital converters (SAR ADCs) is proposed. The scheme implements double input signal processing by the switching of two digital-to-analog converters (DACs), allowing half the reference voltage to process the same input swing, thereby effectively reducing power consumption. Additionally, thanks to the top plate sampling and simultaneous switching of all capacitors on one side to the same reference level, consuming no energy in the first four MSBs and no reset energy consumption. The simulation results show that the proposed switching scheme achieves a 99.9% power reduction and 93% area saving compared to conventional switching scheme. Furthermore, Monte Carlo simulation shows that the root mean square (RMS) of the maximum differential non-linearity (DNL) and maximum integral non-linearity (INL) are 0.083 LSB and 0.084 LSB, achieving a high linearity. Besides, a trade-off between area, power consumption, and linearity can be achieved by adjusting the bit of MSB(M).</p>

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A high linearity and double input range switching scheme for SAR ADC without switching energy in the first four MSBs

  • 期刊论文

  • 发表日期：

    2025年10月31日

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  • Xue Cui,
  • Dawei Dong,
  • Zhenrong Li,
  • Liyan Yu,
  • Zijian Zhang

摘要

A high linearity and double input range (DIR) switching scheme for successive approximation register analog-to-digital converters (SAR ADCs) is proposed. The scheme implements double input signal processing by the switching of two digital-to-analog converters (DACs), allowing half the reference voltage to process the same input swing, thereby effectively reducing power consumption. Additionally, thanks to the top plate sampling and simultaneous switching of all capacitors on one side to the same reference level, consuming no energy in the first four MSBs and no reset energy consumption. The simulation results show that the proposed switching scheme achieves a 99.9% power reduction and 93% area saving compared to conventional switching scheme. Furthermore, Monte Carlo simulation shows that the root mean square (RMS) of the maximum differential non-linearity (DNL) and maximum integral non-linearity (INL) are 0.083 LSB and 0.084 LSB, achieving a high linearity. Besides, a trade-off between area, power consumption, and linearity can be achieved by adjusting the bit of MSB(M).