65.35 nW three-stage charge pump circuit based on swapped body biasing approach
摘要
The recent developments in sustainable energy solutions demand ultra-low power operation of cascaded charge pump (CP) circuits. This work reports a three-stage CP circuit designed using a swapped body biasing (SBB) approach in FinFET (18 nm) technology which showcases notable peak power conversion efficiency of 38.04%, voltage at output of 455.11 mV, power consumption of 65.35 nW, ripple voltage of 19.80 mV and settling time of 80.05 µs (@ 2% band) with input supply voltage of 100 mV. Further, the performance of the designed three-stage CP is investigated for rigorous temperature, process and load variations. The performance of the proposed three-stage CP is better than earlier reported FinFET-based multiple-stage CP designs.