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<p>This study designs a current mode (CM) third-order sinusoidal oscillator using various active building blocks (ABBs), including a voltage difference transconductance amplifier (VDTA) and a plus-type differential difference current conveyor (+DDCC). The construction of the system involved the utilization of one resistor connected to the ground and three capacitors connected to the ground. In addition, the proposed third-order sinusoidal oscillator is designed using dynamic threshold metal oxide semiconductor (DTMOS) technology to achieve minimal power consumption due to leakage. In the proposed circuit, input bias currents are applied to control the oscillation condition (CO) and frequency of oscillation (FO) in an electronically/orthogonally manner. Also, the proposed circuit is suitable for integrated circuits (ICs) as it is designed with only grounded active elements. Subsequently, the circuit’s overall power consumption is reduced by the usage of 0.6 Volts (V) supply voltage. Using the Cadence virtuoso GPDK 90nm technology, various performance analyses are performed to validate the efficiency of the proposed circuit. When compared to other designs, the proposed circuit consumes a power consumption of 48 <InlineEquation ID="IEq1"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="10470_2025_2434_Article_IEq1.gif" Format="GIF" Height="17" Rendition="HTML" Resolution="72" Type="Linedraw" Width="32" /> </InlineMediaObject> <EquationSource Format="TEX">\(\mu W\)</EquationSource> </InlineEquation>, and its total harmonic distortion (THD) ranges from 2.8% to 3.3%, which is within acceptable bounds.</p>

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DTMOS based mixed active building blocks for current-mode third-order sinusoidal oscillator design

  • 期刊论文

  • 发表日期：

    2025年6月16日

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  • Gandikota Naga Chandrika,
  • Gurumurthy Komanapalli

摘要

This study designs a current mode (CM) third-order sinusoidal oscillator using various active building blocks (ABBs), including a voltage difference transconductance amplifier (VDTA) and a plus-type differential difference current conveyor (+DDCC). The construction of the system involved the utilization of one resistor connected to the ground and three capacitors connected to the ground. In addition, the proposed third-order sinusoidal oscillator is designed using dynamic threshold metal oxide semiconductor (DTMOS) technology to achieve minimal power consumption due to leakage. In the proposed circuit, input bias currents are applied to control the oscillation condition (CO) and frequency of oscillation (FO) in an electronically/orthogonally manner. Also, the proposed circuit is suitable for integrated circuits (ICs) as it is designed with only grounded active elements. Subsequently, the circuit’s overall power consumption is reduced by the usage of 0.6 Volts (V) supply voltage. Using the Cadence virtuoso GPDK 90nm technology, various performance analyses are performed to validate the efficiency of the proposed circuit. When compared to other designs, the proposed circuit consumes a power consumption of 48 \(\mu W\) , and its total harmonic distortion (THD) ranges from 2.8% to 3.3%, which is within acceptable bounds.