<p>Quantum Dot Cellular Automata (QCA) is gathering attention from researchers in recent years due to its attractive features of low power, high density and high speed to serve as transistor-less paradigm for next generation circuits. Programmable or configurable architectures in QCA are needed to promote multifunctional capability of logic circuits along with ease of demonstration and fabrication. Moreover, multilayer approach in QCA adds the area efficacy and immunity against random interference. This paper presents the design of novel programmable logic block (PLB) in QCA configuration in multilayer framework which can be easily used to generate variety of digital circuits. The proposed QCA based PLB is further used to realize combinational circuit such as adder etc<i>.</i> and sequential circuits such as D flip flop, random access memory (RAM) element, shift registers etc<i>.</i> The circuits are further analyzed to obtain performance metrics. A comparative assessment has been carried out for the proposed PLB circuit to establish compatibility with the existing circuits. The proposed PLB sets path towards development of future generation complex and configurable computing systems.</p>

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QCA based programmable logic block for implementation of digital circuits in multilayer framework

  • Rupali Singh,
  • Pankaj Singh

摘要

Quantum Dot Cellular Automata (QCA) is gathering attention from researchers in recent years due to its attractive features of low power, high density and high speed to serve as transistor-less paradigm for next generation circuits. Programmable or configurable architectures in QCA are needed to promote multifunctional capability of logic circuits along with ease of demonstration and fabrication. Moreover, multilayer approach in QCA adds the area efficacy and immunity against random interference. This paper presents the design of novel programmable logic block (PLB) in QCA configuration in multilayer framework which can be easily used to generate variety of digital circuits. The proposed QCA based PLB is further used to realize combinational circuit such as adder etc. and sequential circuits such as D flip flop, random access memory (RAM) element, shift registers etc. The circuits are further analyzed to obtain performance metrics. A comparative assessment has been carried out for the proposed PLB circuit to establish compatibility with the existing circuits. The proposed PLB sets path towards development of future generation complex and configurable computing systems.