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<p>In the context of the digital economy era, the demand for computing power is showing an exponential growth trend. Optical computing technology, due to its unique advantages, has become an important development direction for the next-generation computing architecture. To break through the performance bottleneck of traditional computing units, this paper proposes a compact 2-bit optical directional logic multiplier based on micro-ring resonators. The core innovation of this design lies in the use of a micro-ring resonator structure coated with a HfO<sub>2</sub> insulating layer and an ITO activating material, which realizes rapid electro-optic tuning through an applied bias voltage, significantly improving the computing efficiency. The simulation experiment results show that this multiplier structure is highly compact consisting of only 6 micro-ring resonators, with an overall size controlled at 43&#xa0;μm × 25&#xa0;μm; it has excellent performance, with an insertion loss as low as 0.34&#xa0;dB; and it fast operation, capable of stably performing 2-bit multiplication operations. These characteristics fully demonstrate the significant advantages of this design in terms of integration, energy efficiency ratio, and computing speed, providing a feasible technical path for the miniaturization and practical application of optical computing chips.</p>

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Design of a 2-bit compact directional logic multiplier based on micro-ring resonators

  • 期刊论文

  • 发表日期：

    2026年2月2日

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  • Yunying Shi,
  • Tian Zhou,
  • Cong Hu,
  • Aijun Zhu,
  • Haiying Xia,
  • Xijun Huang

摘要

In the context of the digital economy era, the demand for computing power is showing an exponential growth trend. Optical computing technology, due to its unique advantages, has become an important development direction for the next-generation computing architecture. To break through the performance bottleneck of traditional computing units, this paper proposes a compact 2-bit optical directional logic multiplier based on micro-ring resonators. The core innovation of this design lies in the use of a micro-ring resonator structure coated with a HfO2 insulating layer and an ITO activating material, which realizes rapid electro-optic tuning through an applied bias voltage, significantly improving the computing efficiency. The simulation experiment results show that this multiplier structure is highly compact consisting of only 6 micro-ring resonators, with an overall size controlled at 43 μm × 25 μm; it has excellent performance, with an insertion loss as low as 0.34 dB; and it fast operation, capable of stably performing 2-bit multiplication operations. These characteristics fully demonstrate the significant advantages of this design in terms of integration, energy efficiency ratio, and computing speed, providing a feasible technical path for the miniaturization and practical application of optical computing chips.