<p>As the demand for real-time, high-speed, and low-power data processing systems increases, the need for efficient analog-to-digital converters in applications such as biomedical instrumentation, radar systems, and wireless communications also increases. While flash analog-to-digital converters have rapid conversion capability, priority encoders are used to translate the thermometer code output from comparators into a compact binary format. However, traditional complementary metal–oxide–semiconductor-based priority encoders have weaknesses regarding power efficiency, delay, and scalability. This research presents the design and characterization of several 4-to-2 priority encoder architectures optimized from a baseline design of 28 transistors to a compact design of 19 transistors. Implemented using Carbon Nanotube Field Effect Transistors (CNT-FETs) for low-power operation and Graphene Nanoribbon Field Effect Transistors (GNR-FETs) for speed-prioritized systems, the proposed designs incorporate varied logic styles, including transmission gate logic and dual value logic. H-Spice is used to simulate the performance of these encoder architectures. The final CNT-FET-based encoder has 2.786-microwatt power and 4.124 picoseconds delay, and the GNR-FET-based encoder has 2.1-microwatt power and 0.95 picoseconds delay. These results validate the effectiveness of nanoelectronic-based encoder architectures to achieve low-power, high-speed analog-to-digital converter systems.</p>

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Designing priority encoders for an analog-to-digital converter based on carbon nanotube field effect transistor for low-powered systems and graphene nanoribbon field effect transistor for speed-prioritized systems

  • Korrapadu Mahammad Haneef,
  • P. Venkatramana

摘要

As the demand for real-time, high-speed, and low-power data processing systems increases, the need for efficient analog-to-digital converters in applications such as biomedical instrumentation, radar systems, and wireless communications also increases. While flash analog-to-digital converters have rapid conversion capability, priority encoders are used to translate the thermometer code output from comparators into a compact binary format. However, traditional complementary metal–oxide–semiconductor-based priority encoders have weaknesses regarding power efficiency, delay, and scalability. This research presents the design and characterization of several 4-to-2 priority encoder architectures optimized from a baseline design of 28 transistors to a compact design of 19 transistors. Implemented using Carbon Nanotube Field Effect Transistors (CNT-FETs) for low-power operation and Graphene Nanoribbon Field Effect Transistors (GNR-FETs) for speed-prioritized systems, the proposed designs incorporate varied logic styles, including transmission gate logic and dual value logic. H-Spice is used to simulate the performance of these encoder architectures. The final CNT-FET-based encoder has 2.786-microwatt power and 4.124 picoseconds delay, and the GNR-FET-based encoder has 2.1-microwatt power and 0.95 picoseconds delay. These results validate the effectiveness of nanoelectronic-based encoder architectures to achieve low-power, high-speed analog-to-digital converter systems.