Thickness effects of SiO2 underlayers on solid-phase-crystallized Ge thin films
摘要
Polycrystalline Ge thin films are promising for advanced electronic applications, yet the thickness effects of SiO2 underlayer remains incompletely understood. In this work, we investigated how SiO2 thickness (50–300 nm) affects the structural and electrical properties of polycrystalline Ge thin films (200 nm) via solid-phase crystallization. Increasing SiO2 thickness induced tensile strain in the Ge films due to thermal expansion coefficient mismatch, as evidenced by Raman red-shifts and XRD peak shifts. Simultaneously, Raman and XRD linewidth narrowing indicated enhanced crystalline coherence. While Hall effect measurement showed mobility enhancement with increasing SiO2 thickness, EBSD and AFM analyses revealed negligible changes in grain size, grain orientation, grain alignment, and surface morphology. These observations suggest that the mobility improvement may be associated with reduced impurity scattering, possibly related to strain-assisted refinement of intra-grain defects. These results highlight SiO2 underlayer engineering as a simple and effective strategy to optimize carrier transport in poly-Ge thin films, providing useful design guidelines for future device integration.