<p>The unified power quality conditioner (UPQC) is a promising solution for comprehensive power quality management. However, it is inherently associated with high hardware costs, a significant computational burden, and a complex control system. Focusing on the eighteen-switch reused dual-output three-level converter UPQC (18S-RDO-TLC-UPQC) topology, an active power balance-based deadbeat linear active disturbance rejection control strategy is developed. This strategy converts the DC-link voltage control requirement into the generation of an active compensation current reference for the series converter, thereby simplifying the control system structure and significantly improving the DC-link voltage’s dynamic response and disturbance rejection capability. Furthermore, leveraging the characteristics of the 18S-RDO-TLC-UPQC topology and the rolling optimization nature of finite-control-set model predictive control, a phase-by-phase rolling optimization method is proposed, in which the three phase legs are updated sequentially over three consecutive sampling periods within one major control cycle. Integrated with the time-sharing coordinated strategy, the proposed method reduces the computational burden by approximately 87.5%-91.67% while preserving compensation accuracy. Simulation and hardware-in-the-loop experimental results validate the effectiveness and advantages of the proposed strategy.</p>

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A novel active power balance-based adrc and single-leg time-sharing coordinated FCS-MPC optimization strategy for switch-reused unified power quality conditioner

  • Qigang Du,
  • Guifeng Wang,
  • Chao Luo,
  • Jinling Ji,
  • Weipeng Shi,
  • Binghua Zhang,
  • Xiangxin Fan

摘要

The unified power quality conditioner (UPQC) is a promising solution for comprehensive power quality management. However, it is inherently associated with high hardware costs, a significant computational burden, and a complex control system. Focusing on the eighteen-switch reused dual-output three-level converter UPQC (18S-RDO-TLC-UPQC) topology, an active power balance-based deadbeat linear active disturbance rejection control strategy is developed. This strategy converts the DC-link voltage control requirement into the generation of an active compensation current reference for the series converter, thereby simplifying the control system structure and significantly improving the DC-link voltage’s dynamic response and disturbance rejection capability. Furthermore, leveraging the characteristics of the 18S-RDO-TLC-UPQC topology and the rolling optimization nature of finite-control-set model predictive control, a phase-by-phase rolling optimization method is proposed, in which the three phase legs are updated sequentially over three consecutive sampling periods within one major control cycle. Integrated with the time-sharing coordinated strategy, the proposed method reduces the computational burden by approximately 87.5%-91.67% while preserving compensation accuracy. Simulation and hardware-in-the-loop experimental results validate the effectiveness and advantages of the proposed strategy.