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<p>With the increasing demand for electrical energy, power system has grown tremendously. Any fault or large disturbance in such system results in the swinging of generator. The distance relays are blocked during these swings to prevent maloperation. This leaves the protection of power system compromised. Detection of faults under power swing is a challenging task due to the distortion of voltages and currents measured during swing. The odds for identification of faults further increased with the presence of various FACTS devices like TCSC. This work proposes a simple fault detection-based relay under power swing and TCSC. The power system relays require a hardware that can process complex signal processing techniques within a fraction of second for quick clearance of fault. Field programmable gate array (FPGA) is an alternative technology to microprocessor that has high-performance hardware capabilities. FPGA has high data processing capability, carries low cyber security risks and processes the data in true parallel sense with low latency. But designing and testing FPGA-based relays is a time-consuming process using Hardware Description Language (HDL)-based programming. The work presented in this paper presents an alternate method to design, test and validate the digital relay on a low cost FPGA or System On Chip (SOC). This is performed using tools like MATLAB/SIMULINK and XILINX System generator. The proposed fault detection scheme is tested for various conditions of faults during symmetrical or asymmetrical power swing on an IEEE 9 bus system. The proposed technique is also compared with that of existing ones. The waveforms of the tested design are also presented on a oscilloscope for real-time validation.</p>

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Implementation of fault detection for TCSC compensated line during power swing using FPGA SOC

  • 期刊论文

  • 发表日期：

    2026年1月20日

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  • M. L. S. Sai Kumar,
  • Reddi Ganesh,
  • Nishant Kumar

摘要

With the increasing demand for electrical energy, power system has grown tremendously. Any fault or large disturbance in such system results in the swinging of generator. The distance relays are blocked during these swings to prevent maloperation. This leaves the protection of power system compromised. Detection of faults under power swing is a challenging task due to the distortion of voltages and currents measured during swing. The odds for identification of faults further increased with the presence of various FACTS devices like TCSC. This work proposes a simple fault detection-based relay under power swing and TCSC. The power system relays require a hardware that can process complex signal processing techniques within a fraction of second for quick clearance of fault. Field programmable gate array (FPGA) is an alternative technology to microprocessor that has high-performance hardware capabilities. FPGA has high data processing capability, carries low cyber security risks and processes the data in true parallel sense with low latency. But designing and testing FPGA-based relays is a time-consuming process using Hardware Description Language (HDL)-based programming. The work presented in this paper presents an alternate method to design, test and validate the digital relay on a low cost FPGA or System On Chip (SOC). This is performed using tools like MATLAB/SIMULINK and XILINX System generator. The proposed fault detection scheme is tested for various conditions of faults during symmetrical or asymmetrical power swing on an IEEE 9 bus system. The proposed technique is also compared with that of existing ones. The waveforms of the tested design are also presented on a oscilloscope for real-time validation.