<p>The staggered paralleling of active front-end converter modules that share AC and DC buses creates a zero-sequence circulating current issue, leading to a degradation in system performance. The principles of modular interleaved modulation are analyzed, and a mathematical model of the system is provided within the three-phase stationary coordinate system. Additionally, the causes of circulating currents and the impact of interleaved modulation on the circulating currents are examined. Furthermore, an equivalent circuit model for the circulating current in the interleaved parallel system is developed. A method for reducing circulating currents by altering the zero-sequence duty cycle is proposed. A circulating current controller based on the deadbeat algorithm is designed to calculate the zero-vector adjustment parameters for the corresponding module according to the magnitude of the circulating current in each module. The control process for each module is implemented using space vector pulse width modulation (SVPWM), during which the zero vector is adjusted to reduce circulating currents, ensure current balancing, and improve the full-load efficiency of the entire system by 2.3%. Finally, the feasibility and effectiveness of the proposed method are validated through experiments conducted on the constructed experimental platform.</p>