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<p>This paper reports a floating emulator circuit for newly introduced device known as memtranstor. Memtranstor is the fourth member of memelement family after memristor, meminductor, and memcapacitor. It establishes a direct relation between charge and flux. The fingerprint of memtranstor is the pinched hysteresis loop between electric charge and magnetic flux. It offers greater flexibility in circuit design and facilitates the development of various applications. The proposed memtranstor has been realized using an operational transconductance amplifier (OTA), a voltage differencing gain amplifier (VDGA), a dual-output second-generation current conveyor (DO-CCII), a multiplier, and a few grounded capacitors. The circuit has been simulated with the help of SPICE using 0.18&#xa0;μm technology parameters. The pinched hysteresis loops (PHLs) between charge (proportional to the voltage across capacitor C<sub>3</sub>) and flux (proportional to the voltage across capacitor C<sub>1</sub>) have been obtained in all co-ordinates. The provision of fixed DC bias to control the characteristics of memtranstor has also been provided. The proposed emulator circuit has been verified experimentally with the help of discrete ICs and passive components soldered on a zero-PCB. The butterfly shaped PHL observed on oscilloscope confirms the functionality of the proposed emulator in real environment. The operation of the proposed memtranstor emulator is confirmed by implementing a chaotic oscillator circuit.</p>

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Memtranstor Emulator Using Active Building Blocks with Its Application

  • 期刊论文

  • 发表日期：

    2026年6月30日

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  • Shireesh Kumar Rai,
  • Rupam Das,
  • Bhawna Aggarwal,
  • Ashish Kumar Rai

摘要

This paper reports a floating emulator circuit for newly introduced device known as memtranstor. Memtranstor is the fourth member of memelement family after memristor, meminductor, and memcapacitor. It establishes a direct relation between charge and flux. The fingerprint of memtranstor is the pinched hysteresis loop between electric charge and magnetic flux. It offers greater flexibility in circuit design and facilitates the development of various applications. The proposed memtranstor has been realized using an operational transconductance amplifier (OTA), a voltage differencing gain amplifier (VDGA), a dual-output second-generation current conveyor (DO-CCII), a multiplier, and a few grounded capacitors. The circuit has been simulated with the help of SPICE using 0.18 μm technology parameters. The pinched hysteresis loops (PHLs) between charge (proportional to the voltage across capacitor C3) and flux (proportional to the voltage across capacitor C1) have been obtained in all co-ordinates. The provision of fixed DC bias to control the characteristics of memtranstor has also been provided. The proposed emulator circuit has been verified experimentally with the help of discrete ICs and passive components soldered on a zero-PCB. The butterfly shaped PHL observed on oscilloscope confirms the functionality of the proposed emulator in real environment. The operation of the proposed memtranstor emulator is confirmed by implementing a chaotic oscillator circuit.