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<p>This study introduces a novel machine learning-based fault detection framework for transimpedance amplifier (TIA) circuits, achieving exceptional classification accuracy between 96.3 and 98.2% across three distinct circuit configurations, as validated through comprehensive performance metrics including precision (0.93–0.98), recall (0.92–0.96), and F1-score (0.91–0.94). The methodological innovation lies in the development of a hybrid dataset combining 3244 data points from Electronic Design Automation (EDA) simulations and experimental measurements, incorporating two fault patterns—temperature variations (25–100&#xa0;°C) and input signal uncertainties—alongside normal operational conditions. A key contribution is the introduction of a novel Figure of Merit for fault immunity, quantitatively defined as the normalized deviation in transfer characteristics under fault conditions, enabling systematic comparison of circuit robustness. The pre-current amplifier configuration demonstrated superior performance with fault immunity of 0.06, dynamic range of 33.30 mV, ultra-high input impedance of 2.8 GΩ, and power consumption of merely 6.18 mW, significantly outperforming the cascaded configuration (0.08 fault immunity, 12 mV dynamic range, 9 kΩ input impedance, 6.63 mW power consumption). This AI-driven diagnostic approach establishes a new paradigm for assessing and enhancing TIA reliability, particularly critical for biomedical and IoT applications where fault tolerance is paramount.</p>

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Leveraging Machine Learning Techniques to Assess Fault Immunity in Transimpedance Amplifiers

  • 期刊论文

  • 发表日期：

    2026年4月17日

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  • Amira Alaa El-Din Darwish,
  • Kyrillos K. Selim,
  • Ahmed El-Tantawy,
  • Omar Al-Saban,
  • Ola Hassan,
  • Sameh O. Abdellatif

摘要

This study introduces a novel machine learning-based fault detection framework for transimpedance amplifier (TIA) circuits, achieving exceptional classification accuracy between 96.3 and 98.2% across three distinct circuit configurations, as validated through comprehensive performance metrics including precision (0.93–0.98), recall (0.92–0.96), and F1-score (0.91–0.94). The methodological innovation lies in the development of a hybrid dataset combining 3244 data points from Electronic Design Automation (EDA) simulations and experimental measurements, incorporating two fault patterns—temperature variations (25–100 °C) and input signal uncertainties—alongside normal operational conditions. A key contribution is the introduction of a novel Figure of Merit for fault immunity, quantitatively defined as the normalized deviation in transfer characteristics under fault conditions, enabling systematic comparison of circuit robustness. The pre-current amplifier configuration demonstrated superior performance with fault immunity of 0.06, dynamic range of 33.30 mV, ultra-high input impedance of 2.8 GΩ, and power consumption of merely 6.18 mW, significantly outperforming the cascaded configuration (0.08 fault immunity, 12 mV dynamic range, 9 kΩ input impedance, 6.63 mW power consumption). This AI-driven diagnostic approach establishes a new paradigm for assessing and enhancing TIA reliability, particularly critical for biomedical and IoT applications where fault tolerance is paramount.