Scholarlink

<p>Modern multimedia processing systems, operating within the strict limitations of power, area, and throughput, necessitate energy-efficient transform computation. This research introduces an architecture for the adaptive Discrete Sine Transform–Type II (DST-II) that has been optimized and utilizes a lifting-based factorization with no multipliers and just shift–add. With the proposed design, the silicon area would be minimized by 32%, dynamic power by 38%, and throughput would be improved 1.5 times compared to traditional DST-II implementations that are based on multipliers. Moreover, a local variance and energy-driven mechanism for adaptive coefficient tuning boosts compression and reconstruction quality, thus providing an average Peak Signal-to-Noise Ratio (PSNR) increase of 1.8&#xa0;dB and 12% lower mean squared error, a 10% improvement in reconstruction stability across frames, and a 13% enhancement in transform-domain energy compaction for image and video datasets. A pipelined, modular architecture not only guarantees scalability for larger block sizes but also facilitates real-time operation. The obtained results indicate that with the implementation of the Optimized Adaptive Lifting-based DST-II (OAL-DST II), a solution of high fidelity and low hardware cost has been obtained, which is suitable for multimedia applications that are either embedded or portable.</p>

错误：搜索内容不能为空，请输入英文关键词
错误：关键词超出字数限制，请精简
高级检索

Optimized Adaptive Lifting-based Discrete Sine Transform Design for Efficient Image and Video Compression and Improved Performance in VLSI Circuits

  • 期刊论文

  • 发表日期：

    2026年2月20日

查看全文
  • Y. R. Annie Bessant,
  • Ravi Kumar Mugadhanam,
  • Chinnaiyan Ramasubramanian,
  • R. Kannan

摘要

Modern multimedia processing systems, operating within the strict limitations of power, area, and throughput, necessitate energy-efficient transform computation. This research introduces an architecture for the adaptive Discrete Sine Transform–Type II (DST-II) that has been optimized and utilizes a lifting-based factorization with no multipliers and just shift–add. With the proposed design, the silicon area would be minimized by 32%, dynamic power by 38%, and throughput would be improved 1.5 times compared to traditional DST-II implementations that are based on multipliers. Moreover, a local variance and energy-driven mechanism for adaptive coefficient tuning boosts compression and reconstruction quality, thus providing an average Peak Signal-to-Noise Ratio (PSNR) increase of 1.8 dB and 12% lower mean squared error, a 10% improvement in reconstruction stability across frames, and a 13% enhancement in transform-domain energy compaction for image and video datasets. A pipelined, modular architecture not only guarantees scalability for larger block sizes but also facilitates real-time operation. The obtained results indicate that with the implementation of the Optimized Adaptive Lifting-based DST-II (OAL-DST II), a solution of high fidelity and low hardware cost has been obtained, which is suitable for multimedia applications that are either embedded or portable.