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<p>Huffman encoders are the most widely used source encoders in the digital communication systems. This manuscript proposes two architectures of Huffman encoders. In the former case, the total area is reduced by using the proposed folded sorter and buffers instead of the memory storage. In the latter case, one encoding of length <i>N</i> or two encodings of length <InlineEquation ID="IEq1"> <EquationSource Format="TEX">\(\frac{N}{2}\)</EquationSource> </InlineEquation> in parallel are performed by using the encoder of length <i>N</i>. Here, the throughput is increased by allowing two encodings in parallel. All the existing and proposed designs are synthesised using 45 <i>nm</i> CMOS technology using Cadence. Our proposed former design of length 8 achieves <InlineEquation ID="IEq2"> <EquationSource Format="TEX">\(56\%\)</EquationSource> </InlineEquation> reduction in area as compared with the canonical encoder design. Similarly, our proposed later design of length 8 and 4 achieves <InlineEquation ID="IEq3"> <EquationSource Format="TEX">\(84.7\%\)</EquationSource> </InlineEquation> improvement in throughput as compared to the canonical encoder design.</p>

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Efficient VLSI Architectures of Huffman Encoder

  • 期刊论文

  • 发表日期：

    2026年1月28日

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  • M. Mohamed Asan Basiri

摘要

Huffman encoders are the most widely used source encoders in the digital communication systems. This manuscript proposes two architectures of Huffman encoders. In the former case, the total area is reduced by using the proposed folded sorter and buffers instead of the memory storage. In the latter case, one encoding of length N or two encodings of length \(\frac{N}{2}\) in parallel are performed by using the encoder of length N. Here, the throughput is increased by allowing two encodings in parallel. All the existing and proposed designs are synthesised using 45 nm CMOS technology using Cadence. Our proposed former design of length 8 achieves \(56\%\) reduction in area as compared with the canonical encoder design. Similarly, our proposed later design of length 8 and 4 achieves \(84.7\%\) improvement in throughput as compared to the canonical encoder design.