<p>This paper introduces a highly efficient and linear Power Amplifier (PA) using a new harmonic injection approach, underpinned by a proposed analytical model and mathematical framework specifically designed to analyze and utilize internal harmonics. Harmonic injection structures are generally classified into two main types, with one type focused on improving efficiency and the other designed to enhance linearity, often by suppressing third-order intermodulation (IM3). Distinctively, this study places a focused emphasis on the 1-dB Compression Point (1-dBCP), a critical metric for PA linearity which has received limited consideration in prior harmonic injection research. The newly proposed mathematical relationships allow the PA’s linearity to be enhanced significantly through second harmonic injection. Unlike conventional linearization techniques, this approach eliminates the need for additional components such as D/A or A/D converters, power combiners, splitters, frequency doublers, and circulators, making it particularly suitable for compact CMOS integration. To prove this method, a fully integrated 3-stage cascade PA was implemented using the proposed model in a CMOS process, chosen specifically for its inherent 1-dBCP limitations. The results demonstrate impressive improvements with P_1dB, power-added efficiency at P_1dB, gain, and spectral regrowth showing increases of approximately 4.9&#xa0;dB, 11%, 1.3&#xa0;dB, and 10dBc, respectively. Additionally, saturated output power and power gain increased to 15.6 dBm and 15.5 dB, respectively. Notably, the proposed PA achieves the highest Figure of Merit (FOM) compared to similar designs, marking it as a significant advancement in PA design for high-performance, high-demand communication systems.</p>