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<p>In view of the advantages of the single phase adiabatic circuitry, an extensive circuit analysis is carried out for the single phase adiabatic designs and conventional CMOS design at 90&#xa0;nm CMOS technology node. The single phase power clock operation is employed to the efficient MOSFET diode based quasi static adiabatic logic. In order to validate the results, the CAL and SCAL-D circuits are simulated and then their application the Ripple Carry Adder (RCA) design is thoroughly analyzed for energy loss, area, technology scaling and supply voltage scaling. The single phase adiabatic RCA circuit is driven by an energy-efficient PCG. This work gives the 2 to threefold energy saving over conventional CMOS circuit. The single phase adiabatic circuit proves its candidature for ultra low power digital circuit design.</p>

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Energy Efficient Single Phase Adiabatic Logic and Its Application in Ripple Carry Adder Design

  • 期刊论文

  • 发表日期：

    2025年8月19日

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  • Jitendra Kanungo,
  • Jitendra Raghuwanshi,
  • Deepak Sharma,
  • Sudeb Dasgupta

摘要

In view of the advantages of the single phase adiabatic circuitry, an extensive circuit analysis is carried out for the single phase adiabatic designs and conventional CMOS design at 90 nm CMOS technology node. The single phase power clock operation is employed to the efficient MOSFET diode based quasi static adiabatic logic. In order to validate the results, the CAL and SCAL-D circuits are simulated and then their application the Ripple Carry Adder (RCA) design is thoroughly analyzed for energy loss, area, technology scaling and supply voltage scaling. The single phase adiabatic RCA circuit is driven by an energy-efficient PCG. This work gives the 2 to threefold energy saving over conventional CMOS circuit. The single phase adiabatic circuit proves its candidature for ultra low power digital circuit design.