Settling Time-Oriented Design of CMOS Inverter-Based Amplifiers for SC Circuit Applications
摘要
Inverter-based amplifiers have been increasingly employed in many low-voltage and low-power applications. This paper presents a settling time-oriented approach for the design of this type of amplifier for switched-capacitor (SC) circuit applications. The settling behavior of an inverter-based amplifier is characterized approximately by its linear equivalent circuit, and a settling response model is established, with which a settling time-oriented design procedure is developed. To improve the design accuracy, a strategy based on the iterative solution of the settling performance equations is employed. Both one- and two-stage inverter-based amplifiers are discussed. The effectiveness and accuracy of the method are validated by design examples of two different inverter-based amplifiers for switched-capacitor integrators.